The semiconductor industry requires three-dimensional (“3D”) inspection and/or metrology processes for silicon wafers. Such inspection or metrology can be used, for example, to test the through silicon via (“TSV”) and bump structure, pillar and bump structure in mid-end-of-line (MEOL) applications, or the particle shape (e.g., size and height) on a backside of wafers for extreme ultraviolet (EUV) lithograph applications. Typical techniques for inspection or metrology include: (1) triangulation; (2) geometric shadow; (3) various confocal microscope techniques; and (4) white-light (or broadband light) interferometry. Existing triangulation and geometric shadow techniques typically do not provide required accuracy and precision for these applications when the characteristic size of the structures becomes smaller. For example, existing triangulation and geometric shadow techniques can lack the required accuracy and precision for 3D inspection when the target structure height shrinks below 10 μm. Confocal and interferometry methods often do not provide required throughput or are too expensive for 3D inspection in MEOL and back-end-of-line (BEOL). Therefore, what is needed is an inspection and metrology technique that can provide better accuracy for small structures and is more cost-effective.